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VS1063a issue beetween ENCODE and DECODE states

Posted: Sat 2016-12-03 6:43
by devicedeveloper
Hello, support!

I use VS1063a in En-coder and De-coder modes multiply. When Receive mode presents - I switch VS1063 to decode mode:

Code: Select all

 VS10x3_OutReg(SCI_MODE,(1<<SM_SDINEW)|(1<<SM_STREAM)|(1<<SM_RESET));
 delay_ms(10);
  VS10x3_PCMHeader();
When Transmit mode - I switch to encode mode:

Code: Select all

VS10x3_OutReg(SCI_MODE,(1<<SM_ENCODE)|(1<<SM_SDINEW)|(1<<SM_STREAM)|(1<<SM_RESET));
 delay_ms(10);
But issue presents: always VS1063a do not switched to encode mode : no signal from microphone.

Only Hard Reset (throw pin XRESET) solved this problem, I need make Hard Reset and re-config VS1063 and enter encode (or decode) mode. It is working.

Why encode mode sometimes not works after decode mode?
Please, pick me right way to switch flow beetween encode and decode state.

I used also CO-DEC mode (with patches), but another issue presents: after 20 seconds voice will be lagged, I do not know what to do. :(

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Sun 2016-12-04 5:17
by devicedeveloper
I find problem place, but not completely solve.

Problem in DAC OFF state: when I set [SCI_VOL]=0xFFFF, later after entry en-code mode with [SCI_VOL]=0xFEFE sometimes not restored and I hear total silence.

Switching beetween encode and decode state is very fast with patches plugin (without SCI_RESET bit, but with 0x50 entrypoint address patch).

This code works, but 1 case of 100 with issue in encode mode:

Code: Select all

void VS10x3_Reset()
{
 XCS(Set);
 XDCS(Set);
 delay_ms(1);
 
 XRESET(Set);
 delay_ms(1);
 XRESET(Reset);
 delay_ms(10);
 XRESET(Set);
 delay_ms(1);
}

#include "vs1063a-patches.inc"

void VS10x3_Init()
{
 //Slow SPI: 12 MHz/7=1.71 MHz
 SPI3_Init(SPI_BaudRatePrescaler_32); //168(CPU CLK)/4(APB1 DIV)/32(PRE)=1.3125 MHz

 VS10x3_OutReg(SCI_MODE,(1<<SM_SDINEW));
 VS10x3_OutReg(SCI_CLOCKF,0xC3E8); //4.5x * 12 MHz => 54 MHz 
 delay_ms(50);
 
 //Fast SPI: 12 MHz*4.5/7 = 7.7 MHz
 SPI3_Init(SPI_BaudRatePrescaler_8); //168(CPU CLK)/4(APB1 DIV)/8(PRE)=5.25 MHz
 
 VS10x3_OutReg(SCI_BASS,0);         //NO Equaliser 
 delay_ms(5);
 
 VS10x3_OutReg(SCI_AICTRL0,8000);   //8 kHz
 VS10x3_OutReg(SCI_AICTRL1,0);      //AGC Enable
 VS10x3_OutReg(SCI_AICTRL2,1024);   //1x AGC Digital Gain
 VS10x3_OutReg(SCI_AICTRL3,0x0412); //No Header & PCM Encode & Left Channel(MIC)
 
 VS10x3_OutReg(SCI_MODE,(1<<SM_SDINEW)|(1<<SM_STREAM));
 delay_ms(5);
 
 LoadUserCode(); //load patch v. 190
 delay_ms(5);
}

void VS10x3_Encode()
{
 VS10x3_OutReg(SCI_VOL,0x0000); //without this sometimes not working!
 delay_ms(100);
 
 VS10x3_OutReg(SCI_MODE,VS10x3_InReg(SCI_MODE)|(1<<SM_ENCODE)); //encode mode
 delay_ms(5);
 
 VS10x3_OutReg(SCI_VOL,0xFEFE);  //Silence
 delay_ms(5);

 VS10x3_OutReg(SCI_AIADDR,0x50); //run patch
 delay_ms(10);
}

void VS10x3_Decode()
{
 VS10x3_OutReg(SCI_MODE,VS10x3_InReg(SCI_MODE)&(~(1<<SM_ENCODE))); //decode mode
 delay_ms(5);
 
 VS10x3_OutReg(SCI_AIADDR,0x50); //run patch
 delay_ms(10);
 
 VS10x3_OutReg(SCI_VOL,0x0000);    //Volume
 delay_ms(5);
   
 VS10x3_PCMHeader(); //load PCM header
}

// before sleep mode:
VS10x3_OutReg(SCI_VOL,0xFFFF);  //DAC OFF
delay_ms(100);

__asm("sleep");

//.........
Please, help me solve completely this issue!

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Mon 2016-12-05 14:07
by pasi
The vs1053/vs1063 hardware has a small bug in it. If you re-enable ADC without hardware reset, the input channels are sometimes swapped. If you use just one channel, you may get the data of the line input instead of your microphone.

The vs1063 patches package tries to solve this issue by detecting the channel swap and trying again for a number of times. If it is not working for you, I'm not sure if the retry limit is reached or if there is something else wrong.

Hardware reset with xRESET is a sure way, but it does present other issues like RCAP discharging during a reset.

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Mon 2016-12-05 15:54
by devicedeveloper
Hardware reset with xRESET is a sure way, but it does present other issues like RCAP discharging during a reset.
It is no my way, because hardware reset requires more time: when user push PTT button ("push to talk" at walkie-talkie device) delay presents around 1-1,5 second. With patches v.190 delay reduced around 0,25-0.3 second.

And after setting XRESET to 0, analog part of VS1063a is floating - I hear some little noise.

I noticed, that after writing to [SCI_VOL] register need delay around 100 ms and then apply patch (0x50 address). If delay will be short (10 ms for example) - patches will not help and channels will be swapped to!

The hard way - use MONO down-mix, but I lose 50% volume and get some noise from empty channel (it is grounded via 10nF capacitor).

So, I think use delay 100ms after setting [SCI-VOL] register and apply pach after that.

Another question: can I use encode mode with full-OFF [SCI_VOL]=0xFFFF ?

When I press PTT button and enter encode mode, some little noise I hear in my headphones. Monitoring not need. How way may be for solve this problem?

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Wed 2016-12-07 17:59
by pasi
This is easy, so I can answer it directly.
devicedeveloper wrote:Another question: can I use encode mode with full-OFF [SCI_VOL]=0xFFFF ?
No, SCI_VOL=0xffff will turn off analog power, which also means the analog parts of the ADC.

You can use SCI_VOL= 0xfefe for maximum attenuation of the headphones.

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Thu 2016-12-08 13:28
by devicedeveloper
Hello, Pasi!

I know about "0xFEFE". It would be great even if the power supply to the ADC and DAC were separated.

In next chip it is planned, or not? And remove ADC-swap hardware issue?

Re: VS1063a issue beetween ENCODE and DECODE states

Posted: Mon 2016-12-12 13:08
by pasi
The analog powerdown also affects the digital parts of the ADC and DAC. With some encoding samplerates the encoder uses some of the digital parts of the DAC (the samplerate converter), so turning the DAC path completely off wouldn't be an option.

We have investigated what a hardware patch would require. However, each change to the mask set or to the process itself requires a full characterization, so changes are not introduced lightly.