Designing hardware that uses VLSI Solution's devices as slave codecs such as an external MP3 decoder chip for a host microcontroller.
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Joined: Mon 2021-12-06 9:40


Post by k.boodaghi@gmail.com »

We designed a board using VS1063 to receive a HE-AAC v2 stream, converting to and sending I2S.
The HE-AAC input stream features:
Codec: LATM
Type: Audio
Sample Rate: 48000 Hz
Bits per sample:32
AAC Extension: SBR+PS
Everything works fine for hours but we have a problem that occurs randomly.
Sending stream to VS1063 stops because the DREQ pin of VS1063 remains LOW for an unknown reason.
It remains LOW and doesn't work.
Can someone help?
Thank you.
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Re: VS1063 DREQ

Post by pasi »

It sounds like the decoder gets stuck for whatever reason.

Are you using vs1063a patches? Which version?

When this happens, what do you get from the SCI registers? (Especially the samplerate in SCI_AUDATA.)

Are you using samplerate adjustment?

Can you capture the stream (the bytes you're sending to vs1063)? Is this a public web radio stream?

A workaround would be to timeout and restart the decoding.
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