Reading the register continuously does produce some interrupt load. If there are no (or not enough) words to read, your controller can perform some other task or delay.
It should not cause a lockup though.
VLSI1063 hangs during MP3 encoding
Re: VLSI1063 hangs during MP3 encoding
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Re: VLSI1063 hangs during MP3 encoding
ok thanks for answer. During weekend I will put here the simple code with our test.
Re: VLSI1063 hangs during MP3 encoding
Hello!
If I remember correctly, we don't recommend banging on the SCI_RECWORDS (alias for SCI_HDAT1) more often than 1000 times per second. As Pasi said, doing that should not lock anything up, but we cannot guarantee correct function of VS1063.
Kind regards,
- Henrik
If I remember correctly, we don't recommend banging on the SCI_RECWORDS (alias for SCI_HDAT1) more often than 1000 times per second. As Pasi said, doing that should not lock anything up, but we cannot guarantee correct function of VS1063.
Kind regards,
- Henrik
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Re: VLSI1063 hangs during MP3 encoding
Hello Guys from VLSI,
We still trying to find out the reason of random VLSI VS1063 core hanging. We prepared changed layout for 4 layers PCB, repleaced 3V3 DCDC to LDO just to avoid converter noise.
Even with improved EMC still time to time device hangs.
Measurement done with magnetic field probe under codec at distance 2cm.
Legend:
yellow - series double sided PCB
red - double sided PCB prototype
blue - 4 layer PCB prototype.
Could you suggest us procedure how to check if VLSI core works? We are asking buffer fill reg. but it seems to be hardware part of IC which works permanently.
Kindly Regards
Simon
We still trying to find out the reason of random VLSI VS1063 core hanging. We prepared changed layout for 4 layers PCB, repleaced 3V3 DCDC to LDO just to avoid converter noise.
Even with improved EMC still time to time device hangs.
Measurement done with magnetic field probe under codec at distance 2cm.
Legend:
yellow - series double sided PCB
red - double sided PCB prototype
blue - 4 layer PCB prototype.
Could you suggest us procedure how to check if VLSI core works? We are asking buffer fill reg. but it seems to be hardware part of IC which works permanently.
Kindly Regards
Simon
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Re: VLSI1063 hangs during MP3 encoding
I have two ideas to try to divide and conquer the issue.
1. Can you try 1.9V-2.0V CVDD? However, you already use lower than max clock, so this shouldn't change the situation.
2. Encode with the UART output enabled and don't read the data through SCI to see if the encoding still crashes. If a crash happens, the UART output probably stops.
Did you already compare to how it performs without the patches package?
1. Can you try 1.9V-2.0V CVDD? However, you already use lower than max clock, so this shouldn't change the situation.
2. Encode with the UART output enabled and don't read the data through SCI to see if the encoding still crashes. If a crash happens, the UART output probably stops.
Did you already compare to how it performs without the patches package?
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