VS1005 Power Consumption

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VS1005 Power Consumption

Post by Henrik » Mon 2014-07-21 12:36

Hello forum readers!

Last week we made some VS1005g power performance measurements. Some of the following data is going to end up in future versions of the datasheet. Nevertheless, I thought some of you might be interested in the complete set of measurement data.

Today we start with digital power consumption.

What we measured was VS1005g digital power consumption (CVDD). The figures do not include analog (AVDD) or I/O power (IOVDD). Power consumption has been measured running an MP3 decoder under VSOS 3.11. In this test, the MP3 decoder decodes a 1-second 128 kbit/s 44.1 kHz stereo clip from RAM memory in a loop. This way I/O traffic doesn't come into the measurements. CVDD power consumption includes the processor core, all digital interfaces, as well as the 6.144 MHz upsampling converter and its filters, and the Digital-to-Analog converters. The earphone amplifiers/buffers are not included, as they belong to the AVDD domain, nor any I/O traffic.

Currently VSOS doesn't shut down unneeded hardware blocks of VS1005g. Thus, when the default firmware is used to decode audio, more power is consumed than what is absolutely needed. The idea is that when a product is close to ready, it is possible to have a look at what hardware is necessary and what isn't, then deactivate everything that isn't needed. You can see in the table below how optimization helps.

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128 kbps 44.1 kHz stereo MP3 decoding current, CVDD = 1.67V, XTALI = 12.288 MHz
Clock       Current  Description
60.000 MHz  24.4 mA  Default firmware, using RF clock to get exactly 60 MHz
61.440 MHz  16.5 mA  Same as above, but using PLL clock = 5X XTALI instead of RF clock
61.440 MHz  13.4 mA  5X XTALI clock, all unneeded on-chip peripherals left without power / clock. 45% of power saved!
36.684 MHz  12.0 mA  3X XTALI clock, over 50% power savings!
30.720 MHz  11.6 mA  2.5X XTALI clock, would be just enough for 320 kbps MP3
24.576 MHz  11.1 mA  2X XTALI clock, enough for 128 kbps MP3
Even lower clock frequencies can be used if we know beforehand that our MP3's are low-bitrate and low-sample rate:

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Low-samplerate low-bitrate decoding current, CVDD = 1.67V, XTALI = 12.288 MHz
Clock       Current  Description
12.288 MHz   7.4 mA  XTALI clock, 96 kbps 16 kHz stereo MP3
6.144  MHz   3.8 mA  XTALI/2 clock, 56 kbps 16 kHz mono MP3
0.012  MHz   0.1 mA  XTALI/1024 clock, running busy loop (Note: need to turn analog out off)
In the last example, with the XTALI/1024 clock = 0.012 MHz = 12 kHz, analog output needs to be muted (e.g. by turning off VS1005's analog output drivers). Otherwise the sample rate converter that normally upconverts audio to 6.144 MHz, will operate at 6.144 MHz / 1024 = 6 kHz, and your earphones will be filled with mysterious sigma-delta noise.

It should be noted that VS1005g's power consumption is quite dynamic. If the CPU does little or nothing, less power is consumed. Compare the MP3 decoding figures above to the situation below, where the processor is running, but idle over 95% of the time:

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No decoding, CPU idle for > 95% of time, CVDD = 1.67V, XTALI = 12.288 MHz
Clock       Current  Description
61.440 MHz   7.1 mA  5X XTALI clock
36.684 MHz   5.5 mA  3X XTALI clock
30.720 MHz   5.1 mA  2.5X XTALI clock
24.576 MHz   4.6 mA  2X XTALI clock
12.288 MHz   3.0 mA  XTALI clock
6.144  MHz   1.6 mA  XTALI/2 clock
Finally it should be noted that the lower limit for CVDD, 1.65 V, is something VLSI promises over the whole accepted clock range, upto 98 MHz. If you are running at a lower speed, like 24.576 MHz, you can also lower the voltage a bit, and thus also lower power consumption. Although VLSI doesn't officially support voltages below 1.65 V, here are some MP3 decoder tests at lower voltages:

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128 kbps 44.1 kHz stereo MP3 decoding current at 24.576 MHz, XTALI = 12.288 MHz
Voltage Current  Description
1.67 V  11.1 mA  Inside official limits for sull speed
1.52 V  10.0 mA  Not inside official specs, but almost certainly works with 2X clock at all temperatures
1.47 V   9.6 mA  A voltage with somewhat more risk
1.42 V   9.3 mA  A voltage with even more risk
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Re: VS1005 Power Consumption

Post by Henrik » Tue 2014-07-22 14:12

As the second part we have analog power consumption.

The amount of analog current consumed is greatly dependent on whether the stereo earphone driver is on or not, whether VS1005 is connected to a high-impedance amplifier input (no significant load) or headphones (e.g. 30-ohm load), and on the signal that is being played back.

You can get very high currents when playing a full-amplitude sine wave to low-ohm headphones, so you need to prepare your design so that it can momentarily provide VS1005's analog power input with a high current. However, even with loud music, the average current is much lower.

The amount of current is also dependent whether you use 1.2 V or 1.6 V for the common ground buffer CBUF. Running the ground buffer at 1.2 V uses less power, but you get a louder signal when using 1.6 V. As a default, VSOS sets VS1005 up to use 1.6 volts.

Below is the table that shows the analog power consumption in different scnarios.

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Analog Power Consumption in different situations.
XTALI=12.288 MHz, CLKI = 24.576 MHz, CVDD = 1.8 V, IOVDD = 3.3 V

.                                         AVDD = 2.75 V      AVDD = 3.60 V
.                                         1.2 V reference    1.6 V reference
.                                         30 ohm  No load    30 ohm  No load
Full-scale 1 kHz sine wave, full volume  42.0 mA   5.4 mA   57.4 mA   8.7 mA
Loud music, full volume                  11.2 mA   5.3 mA   15.6 mA   8.1 mA
Loud music, moderate volume (-20 dB)      5.6 mA   5.3 mA    8.3 mA   8.0 mA
Silence between songs, full volume        5.4 mA   5.3 mA    8.1 mA   8.0 mA
Mute (no analog drivers)                  1.8 mA   1.8 mA    2.5 mA   2.6 mA

Full-scale sine wave was at 2.54 mVpp (0.90 Vrms) with 1.6 V reference.
Full-scale sine wave was at 1.88 mVpp (0.66 Vrms) with 1.2 V reference.
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Re: VS1005 Power Consumption

Post by Henrik » Tue 2014-07-22 14:20

Finally, there is IOVDD power consumption.

IOVDD power consumption depends a lot on how much you use different I/O peripherals. However, the crystal oscillator is also handled by I/O, which causes some current to be consumed even if there is no I/O activity.

The following table presents the I/O power consumption at several IOVDD voltages when audio playback is active, but there is no particular I/O traffic outside the VS1005.

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I/O Power Consumption, XTALI=12.288 MHz, CLKI=24.576 MHz

IOVDD  Current
1.8 V  0.46 mA
2.7 V  0.85 mA
3.6 V  1.51 mA
As you can see from the table, if you are not using I/O and want to optimize power consumption, setting it to 1.8 volts will save you a barely noticeable sip of juice.
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Re: VS1005 Power Consumption

Post by Panu » Mon 2016-10-24 10:32


At time of writing this, I'm working on optimizing the power consumption for a new VS1005 demonstration player. That player has a different LCD and a different backlight, which is currently disabled. Here's some raw power consumption optimization data for you to consume, take ideas, and compare to your own player project :D

The leftmost column shows the VSOS shell command given for a particular purpose. The rigthmost columns show the measured power consumption of the complete PCB, measured from VHIGH input, including SD card and headphones (Beyerdynamic DT 231) in milliamperes. The first mA figure is power consumption when the board is showing the VSOS command prompt (to PC via UART) and is ready to accept new commands. The second mA figure is one power consumption sample from playing a VLSI traditional test song, HampsterDance.mp3 at 128 kbps.

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Command                           Purpose                                     Prompt mA   Play MP3
-----------------------           -------------------------------             ------      -----------
Power off                         PCB leakage, resistors etc                  0.050
Kernel boot                       Initial condition, VSOS 3.36                79.1        96 mA
change SD driver (SDSDMON1)       cancel multiple blk reads                   63.0        71
auoutput -r44100                  Set output sample rate                      59.3
SetClock 61                       Switch from RFPLL to core PLL               59.6
ybitclr fed2,8                    Switch off RFPLL                            42.2        55
SetClock -P -c1.4 -a2.5 -i2.5 36  Brown-out reset off, lower volts and clk    29.0        45
auoutput -l-12                    Adjust volume                               29.0        38
Change SD card                    Try smaller microSD card (1GB)              29.0        34
ybitset fece,4                    Gate AD block clk                           28.42
ybitset fece,5                    Gate FM block clk                           28.07       33

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ybitset fc33,f                    Gate EXT/SPDIF block clk                    27.37       32
ybitset fc33,d                    Gate USB block clk                          26.97       32  
ybitclr fed2,4                    Switch to lower reference                   26.2        31
SetClock 30                       Set 30 MHz clock                            25.7        30
ybitclr fed2,0                    Switch AD1 modulator off
ybitclr fed2,1                    Switch AD2 modulator off
ybitclr fed2,2                    Switch AD3 modulator off                    21.8        26
                                  Disable power LED                           17.3        22
ybitset fece,6                    EDIT1: Later we realized that FVDD was
ybitset fece,3                    feeding IOVDD thru 0R on the PCB. These 3
ybitclr fece,3                    commands disable the FVDD regulator.        13.3        18.5    

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                                  Back to pre-edit1 condition                 17.3
ybitclr fecb,3                    Disable analog drivers                      14.9
ybitclr fecb,6                    Disable DAC                                 13.2
ybitclr fed2,3                    Disable voltage reference                   11.6
setclock 12                       Disable core PLL                            9.50
ybitset fc33,9                    Divide XTALI by 2 (6 MHz clk)               7.61
* see EDIT1                       Disable FVDD regulator                      3.71
The best achieved power consumption for playing that particular piece of dance music, MP3, 128kbps, at a moderate volume was about 18.4 milliamperes, theoretically giving continuous play time of 135 hours from a 2500mAh battery. Different codecs have different power consumptions, MP3 doesn't have especially high or especially low power consumption.

At 3.71 mA, the VSOS is running and ready to accept UART commands at 57600 bps, able, for example, to list files in the SD card or external SPI flash. Commands take longer to execute but everything works properly.

The power consumption can be brought down further by enabling divide-by-256 circuitry for XTALI (ybitset fc33,a) which gives 1.8mA power consumption with the core running at 23.5 kHz. It could be further minimized by switching to use the RTC crystal as the core clock and switching off the XTAL oscillator. These states can be useful e.g. for suspend conditions, but they are not practical for communicating over UART.
Info: Line In and Line Out, VS1000 User interface, Overlay howto, Latest VSIDE, MCU Howto, Youtube
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Re: VS1005 Power Consumption

Post by Henrik » Tue 2017-09-12 13:33

One thing missing from this thread is RTC power consumption from the RTC battery.

We did the measurements with an LR44 battery that had a voltage of 1.56 V. We did it with one VS1005, namely the one located on my VS1005g Developer Board.

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VS1005 RTC powered by LR44 battery
LR44VDD Current  Description
1.56 V  1.93 uA  RTC running normally with no accesses to it.
1.56 V  2.02 uA  Write to RTC registers in busy loop.
1.56 V  2.04 uA  Read from RTC registers in busy loop.
1.56 V  1.93 uA  RTC set as 32.768 kHz clock source for VS1005 (with "SetClock rtc").
So, as you can see, the RTC eats around 2 microamperes of current from the RTC battery whichever way you use it.

Kind regards,
- Henrik
Good signatures never die. They just fade away.

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