VS1005 Schematic design constrains

Discussion about writing software for VS1005 and the VSOS Operating System. Also posts about VS1005-related hardware design and device drivers should be posted here.
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clintct
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Joined: Fri 2020-11-20 14:28

VS1005 Schematic design constrains

Post by clintct »

Hi VLSI Team,

Below are some quires regarding VS1005 schematic design:-

1.If I want to dump the initial program to VS1005G-F-Q internal flash using the USB interface (USBD+ and USBD-) what all schematic design constraints I need to provide onboard?

2.If am not using internal RTC of VS1005G-F-Q can I keep the following pins open RTCVDD, XLALO_RTC, XTALI_RTC. If not can you suggest what should be the connection?

3.If am not using the FM feature of VS1005G-F-Q I keep the following pins open AVDDRF, RF_P, RF_N. If not can you suggest what should be the connection?

4.If I am not using an SD card, LCD display, and external SPI flash what should be the level of corresponding CS pins. Should i keep it low? Please confirm?
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