Discussion about writing software for VS1005 and the VSOS Operating System. Also posts about VS1005-related hardware design and device drivers should be posted here.
I think this will make it so much easier on me while retaining much of the benefits of the PMIC that helps me maintain the power budgets allotted for in the USB spec. I already have VBUS detection for related purposes, so this addition comes almost for free.
Thanks for the heads-up on poorly behaving regulators. I will try to choose wisely. At the very least, as long as I choose a common footprint, I can substitute regulators fairly easily. I will also heed your recommendation to set the internal AVDD reg below the voltage of the external one (when it is in use). I will also try to be mindful of the filter design. Any recommendations right off the top of your head? Are you thinking something more complex than decoupling capacitors? The regulator will only be used when USB communication is enabled, and when that happens, audio will be disabled.
Most of the time a normal capacitor filters is OK. Getting for example a pi-filter correct or anything which has inductors is way more harder.
One thing to take a look is also continuous - discontinuous mode change. In discontinuous mode you have much more higher ripple on low frequency. You may end up having smaller than first designed inductor, extra loads and that kind of stupid things, which will eat you efficiency to keep the regulator in continuous mode.
A good, tight, layout design is also required and then put some extra places if you can spare them for random capacitors. With first prototype you could end up going through quite many capacitor values to take some frequencies out.
I will not be using switching regulators. Even my charger/PMIC is linear, so hopefully that greatly simplifies filter design requirements. I briefly considered switchers for the VS1005's digital circuitry, but I decided that just using a larger battery was a simpler and safer bet design-wise.
I think the critical thing now is ensuring safe behavior of the external 3V6 regulator when it is unpowered and the internal AVDD regulator is used instead. I know regulators can be had with so-called reverse current protection (not to be confused with reverse polarity protection), but of course I need to make sure this behaves the way I need it to! I feel like I'm finally getting real close to completing my general schematic. I hope very few stones are left unturned
I would like to revisit this most recent topic because I'm doing my PCB layout and I'm finding it to be a tight squeeze. I went back and looked through charger IC options which somehow got me into looking at the USB electrical characteristics and found that the spec calls for the 1.5k pull-up on D+ to be tied to a voltage anywhere from 3.0V-3.6V, and "The static output swing of the driver in its low state must be below VOL (max) of 0.3V with a 1.5k load to 3.6V and in its high state must be above the VOH (min) of 2.8V with a 15k load to ground", and that the driver output impedances should be between 28 to 44 ohms. From my understanding, it would seem to be possible to electrically meet those requirements by powering the signaling electronics by a voltage source as low as 3V.
So my question is this: Is there something inherent in the VS1005's USB UTMI/PHY that prevents it from being reliably used with an AVDD below 3.6V (but above 3.0V)?
While a pullup (including a controllable one, depending on implementation) always provides "output" up to the rail voltage, an active output driver cannot drive up to its supply voltage. For example the high output level of the digital pins is guaranteed 0.7x IOVDD.
USB Full Speed will probably work with a lower AVDD, even when the voltages are not quite at the USB spec.
(With vs1000 I have used Full-Speed with 3.6V VHIGH, producing about 3.4V AVDD. I don't think we have ever tested how low it will go with various USB hosts.)
That makes sense to me. But in the worse case, 0.7 x 3.6 is already below spec. I imagine the chances of a chip's USB hardware only meeting minimum spec is pretty low. For a one-off, I could take those chances, but I'd hate to shoot myself in the foot by not ensuring sufficient tolerance in a design intended for production.
The 0.7x is an example of how the levels of digital output pins are defined in the datasheet.
The USB pins are technically analog pins, as they are powered from AVDD. The high output should be about one diode drop / threshold voltage below the supply. In my observations of vs1000 about 0.2V on average. But it could be a bit more depending on the lot, which creates your dilemma.
I have decided to accept that, under some circumstances, a user may be required to be above some state of charge in order for USB communication to function.
