Re: VS1010 and eMMC
Posted: Tue 2019-08-20 5:58
Hi Panu!
Thanks for all the effort! It is very much appreciated!!
I followed the instructions for the UART method and I got it to work!! I moved some MP3 files from the dev board and the default player plays them great!
To answer some questions:
So to understand correctly, would you recommend the next rev of this schematic (or any future design) be drawn such that it defaults to runlevel 1 (or any of the ones you mentioned) then simply drop in a boot.dlx to choose the runlevel based on the specific UI of the design?
Again thanks for all the effort!
Rodrigo
Thanks for all the effort! It is very much appreciated!!
I followed the instructions for the UART method and I got it to work!! I moved some MP3 files from the dev board and the default player plays them great!
To answer some questions:
I did solder on a jumper such that there wouldn't be a need to keep pressing the button for each power cycle to get to runlevel 2.It may be due to the runlevel (2) or due to something else.
Voltages will be most stable with a battery plugged-in instead of only USB power.Tomorrow I must check the voltages, if they are stable or not.
There is no resistor across XTALI/XTALO. I will add this to the list of reworks needed for the prototypes. I tried a 470k resistor as in the dev board but that didn't work very well.Does the XTAL have the 1M resistor across XTALI,XTALO?
Thanks for this bit of info. It will be very useful! In this boot.dlx, can the GPIOs be set to to turn on or off LEDs? I ask so I can use an LED color to indicate how the product is booted in production.Next I wrote a small BOOT.DLX patch to boot the unit differently based on the button presses. I was able to detect S1 and S3 using the schematic Tuukka had. S1 forces it to mass storage, S3 forces it to player, others remain at default runlevel (2). This is what you would do in your product.. the SPI0 resistors set the default runlevel, but when the eMMC is formatted, the BOOT.DLX program is run and that program determines what the board does.
So to understand correctly, would you recommend the next rev of this schematic (or any future design) be drawn such that it defaults to runlevel 1 (or any of the ones you mentioned) then simply drop in a boot.dlx to choose the runlevel based on the specific UI of the design?
Again thanks for all the effort!
Rodrigo