Best possible board layout (VS1053b)

Designing hardware that use VLSI Solution's devices as the system controller for the entire design.
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SJS
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Best possible board layout (VS1053b)

Post by SJS » Mon 2021-01-25 19:52

Hello together,

first of all many thanks for all the recommendations considering the board layout of your products, i have read all of them and they are very helpful!

I am designing an new application with VS1053b (ethernet internet radio + class D amp + I2C tone control) an have a few questions before starting the pcb layout:

1) Are the recommendations here: viewtopic.php?f=2&t=1101 and here http://www.vlsi.fi/fileadmin/app_notes/ ... layout.pdf are still up-do-date or are there newer hints regarding AGND and DGND? I would start with the layout in the last link and @Panu's "virtual gap" recommendation.

2) Is there any audio perfomance expected to be better with a 4-layer board (because of separation of Power and GND layer)? As i have seen in some Eagle packages, often a 4 layer pcb is used - but for me it is not clear if this is GND-related (=maybe better S/N ratio) or because of the sum of signals to be routed.

3) As suggested here viewtopic.php?f=9&t=69 i would integrate all filters visible in the schematic. What i have seen in different schematics from your eval boards, there are some improvements with NP0 capacitors. Do you have some recommendations where "better" capacitors should be placed? I also think about film capacitors instead of electrolytic capacitors for DC blocking in the signal path...what do you think? The cost of this project is secondary - the sound quality is primary.

Thanks in advance for your help!
Stefan

Hannu
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Posts: 145
Joined: Mon 2016-05-30 11:54

Re: Best possible board layout (VS1053b)

Post by Hannu » Tue 2021-01-26 16:43

Hello and welcome tothe forum!
SJS wrote:
Mon 2021-01-25 19:52
Hello together,

first of all many thanks for all the recommendations considering the board layout of your products, i have read all of them and they are very helpful!
You are half way of a good board. Following those documents you'll get a pcb with a decent performance. Rest is mostly thinking about return currents and suppressing noises.
I am designing an new application with VS1053b (ethernet internet radio + class D amp + I2C tone control) an have a few questions before starting the pcb layout:
OK. So you know your sources of noises. Those will transfer mainly through ground, power and digital signals. Have a good amount of fast capacitance on the power net of those IC's and place them as close as possible. Route their powers carefully and think of their return currents.

Think about separating the powers with some filters so that devices don't ruin each others powers. Own regulator is usually a good filter. This also is mentioned in app note but have three regulators for vs1053.

1) Are the recommendations here: viewtopic.php?f=2&t=1101 and here http://www.vlsi.fi/fileadmin/app_notes/ ... layout.pdf are still up-do-date or are there newer hints regarding AGND and DGND? I would start with the layout in the last link and @Panu's "virtual gap" recommendation.
All VLSI's chips should be designed with "connect AGND and GND together under the chip" rule. At least I don't have information which would contradict documents. Exact values of some components have changed over the years, but the basic circuits haven't.

The virtual gap is a method of thinking the return currents of the signals. For example I usually design with one ground and have drawn areas where analog, digital and power nets can go on documentation layer. After I have done the design I delete the confinement areas and split the ground to AGND and GND. One ratsnest should appear. Then I connect it under the chip. And one DRC violation. Anyway the results are the same.
2) Is there any audio perfomance expected to be better with a 4-layer board (because of separation of Power and GND layer)? As i have seen in some Eagle packages, often a 4 layer pcb is used - but for me it is not clear if this is GND-related (=maybe better S/N ratio) or because of the sum of signals to be routed.
Having a separate ground layer makes things easier. You can always just go down with via and tie your capacitor to ground. Also the return current flow just under the top layer trace. This makes easier to design tight boards and as a bonus you get ground shield and known capacitance under the trace. The capacitance is important on USB compliance.

So performance gain usually comes mainly from the tighter layout and undisturbed routing of the signal.
3) As suggested here viewtopic.php?f=9&t=69 i would integrate all filters visible in the schematic. What i have seen in different schematics from your eval boards, there are some improvements with NP0 capacitors. Do you have some recommendations where "better" capacitors should be placed? I also think about film capacitors instead of electrolytic capacitors for DC blocking in the signal path...what do you think? The cost of this project is secondary - the sound quality is primary.
The first HF ground path as close as possible DAC output. Taking HF currents around board isn't good idea. Then the SDM reconstruction filter which filters out most of the DAC noise. Then have a look what kind of input filters your amplifier. if your amplifier wants differential signal, you may be able to even get the signal between CBUF and LEFT and RIGHT. Just design your input filter so that high audio frequencies don't drop too much.

The NP0 rating is temperature stability rating and which happens also give good linearity. So if you have idea of good linear capacitor, use those on the signal path. One capacitor type which has given some improvements in some designs has been electrolytic polymer capacitor. But often these kind of things can be measured but not heard. Changing components, measuring and repeating is way to squeeze last tenths of decibels in performance. So design your first board well but leave some freedom for testing and tweaking.

SJS
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Re: Best possible board layout (VS1053b)

Post by SJS » Tue 2021-01-26 18:23

Thanks a lot @Hannu for your very useful explanations!
Rest is mostly thinking about return currents and suppressing noises.
So you know your sources of noises. Those will transfer mainly through ground, power and digital signals. Have a good amount of fast capacitance on the power net of those IC's and place them as close as possible. Route their powers carefully and think of their return currents.
Think about separating the powers with some filters so that devices don't ruin each others powers. Own regulator is usually a good filter. This also is mentioned in app note but have three regulators for vs1053.
My design will include separated, low noise LDO (not the AMSxxxx series i often see on low priced boards) with a larger capacitor near by the regulators output and and a 100nF X7R as close as possible to the chip - and the small capacitor is connected via a ferrite bead to the larger C. This "system" is applied to all power rails. So there should be minimized impulsive currents flowing and EMI should be reduced.
All VLSI's chips should be designed with "connect AGND and GND together under the chip" rule. At least I don't have information which would contradict documents. Exact values of some components have changed over the years, but the basic circuits haven't.
Sorry, that was my mistake in reading and interpret the eagle files/layers correctly. But i.e. in your amplifier evaluation board, i don't understand why the second GND path below is applied, please see the attachment. As mentioned in another examples, no air gap between GND areas are recommended but in this example there are GND "zones". Maybe you can help me to understand if this is maybe historic design and today we should avoid this gaps for a better perfomance, so this would save me some iterations with pcb's :-)
snip_20210126172212.png
snip_20210126172212.png (101.04 KiB) Viewed 161 times
The virtual gap is a method of thinking the return currents of the signals. For example I usually design with one ground and have drawn areas where analog, digital and power nets can go on documentation layer. After I have done the design I delete the confinement areas and split the ground to AGND and GND. One ratsnest should appear. Then I connect it under the chip. And one DRC violation. Anyway the results are the same.
This sounds very practical, thanks!
Having a separate ground layer makes things easier. You can always just go down with via and tie your capacitor to ground. Also the return current flow just under the top layer trace. This makes easier to design tight boards and as a bonus you get ground shield and known capacitance under the trace. The capacitance is important on USB compliance.
Thanks again, so i think a 4 layer board would be the better solution.
The NP0 rating is temperature stability rating and which happens also give good linearity. So if you have idea of good linear capacitor, use those on the signal path. One capacitor type which has given some improvements in some designs has been electrolytic polymer capacitor. But often these kind of things can be measured but not heard. Changing components, measuring and repeating is way to squeeze last tenths of decibels in performance. So design your first board well but leave some freedom for testing and tweaking.
I will leave some space for testing various capacitors, that is a good hint!

Thanks again for your great help!
Stefan

Hannu
Senior User
Posts: 145
Joined: Mon 2016-05-30 11:54

Re: Best possible board layout (VS1053b)

Post by Hannu » Wed 2021-01-27 11:44

Hi!

Your plan sounds very good indeed.

I gave a look at VS1005 amp board. The design could be better or at least easier to understand.

The components on lower right corner are on audio signal path so they need good ground. Also the input signal for the amplifier is on top of that bottom ground path. and I believe the idea of the loop is to get same reference ground to both VS1005 and the amplifier.

The connectors are USB with BERG electronics silk (X2) and power jack (CN2). The USB traces are over the ground which goes to X2. If the ground plane was single plane, all power supply noise would get straight to the audio components. Now it has a chance to get filtered by some input capacitor.

This is how I would explain the current design. There may be some ideas that the designer of the board has consider and I don't know.

You are also correct that there is a ground loop. If I was trying to break the loop, I would try to protect the audio signal with CBUF signal until it reaches DC block capacitors and break the bottom ground path. Then I would measure and see if there was any difference at all and keep wondering from where the new problems came from. With VS1053 you don't have USB connectors which gives problems in ground design and the result should be nicer.

The CBUF is the DC offset signal between AVDD and ground so it works reference for audio signals, return path for headphones and other end for differential input. If DAC is outputting value 0 and the SDM noise is filtered out, it has same voltage as CBUF.

I'll add the my favourite fairy tale here: "Once upon time there was a analog designer who got perfect design on first try and lived happily ever after." :)

SJS
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Re: Best possible board layout (VS1053b)

Post by SJS » Wed 2021-01-27 15:36

Hannu wrote:
Wed 2021-01-27 11:44
I'll add the my favourite fairy tale here: "Once upon time there was a analog designer who got perfect design on first try and lived happily ever after." :)
:lol: :lol: :lol:

Thanks again Hannu for your help in understanding some things for a perfect design...i will do my best and if you want, i can share my results here :-)

Regards,
Stefan

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