VS23S010 and VGA monitor

Designing hardware and software that uses the VS23S0X0 family of ICs as a 8-bit or SPI SRAM memory or as a Video Controller for generating Composite Video (TV-Out) or driving other kinds of displays.
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Panu
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VS23S010 and VGA monitor

Post by Panu » Mon 2016-02-01 0:07

Here's a couple of pictures from when I was testing how a single VS23S010 could be used to make a VGA picture. These are proof-of-concepts really...

The VS23S010 has one analog output and four slow digital outputs that are meant to be used for making sync signals. But nothing prevents from tying them to the color inputs of the VGA monitor to make something more interesting than a greyscale or monochrome picture. Basically you could have a colorful frame around the picture or have different background color for different lines to make the display more "lively"...

Here's analog output connected to green and digital outputs connected to red and blue.
WP_20141001_001.jpg
WP_20141001_001.jpg (363.04 KiB) Viewed 3843 times
Here's analog output connected to green and red and digital output connected to blue. Could be used to make a quite professional-looking white text on blue background kind of display.
WP_20141001_009.jpg
WP_20141001_009.jpg (322.26 KiB) Viewed 3843 times
Attachments
arch-vga1-2016-02-01-00-04-ProofOfConcept.zip
VGA monitor proof-of-concept code, VSIDE Solution for VS1005 Developer Board with VS23S010 Display Daughterboard
(68.2 KiB) Downloaded 223 times
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Panu
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Re: VS23S010 and VGA monitor

Post by Panu » Fri 2017-03-10 13:23

Hi!

After a short pause, we've done some VS23S010 video stuff again. And one thing that we've planned to do for a long time but never got around to was to test the idea of a VGA output using 3 chips. This was something that was planned when we made the silicon, and finally we were able to test that it actually works!
vs23s010 3chip truecolor vga out.jpg
vs23s010 3chip truecolor vga out.jpg (74 KiB) Viewed 3229 times
Here is a picture of our first test with 3 VS23S010D chips, connected together to a single SPI bus with a single chip select. Each chip does one color signal (Green, Red and Blue), and one of the chips does the HSYNC and VSYCN output from the digital outputs (D4, D5). And happily I can report that the chips work as they're supposed to: they remain in sync with each other, producing a beautiful 24-bit truecolor VGA experience from a single SPI bus.

Now waiting for you to try it out for yourself! Ask for help here, buy VS23S010D online, or contact our sales for samples!

-Panu
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wfriedrich
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Re: VS23S010 and VGA monitor

Post by wfriedrich » Tue 2019-02-05 15:58

Hello Panu,

from the demo code, I understand the crystal for the VS23S010 is 12 MHz and the PLL is enabled. This does not fit with the datasheet numbers, which indicate a max clock of 4.5MHz with PLL.
When I am trying to output VGA 640x480 at 60Hz, the pixel clock is 25.175 MHz. Would a 25.175 MHz crystal and disable the PLL be the best choice for that, as a crystal frequency of 3.146875 MHz (25.175/8) is not a common one? The standard PAL and NTSC crystal for example would give more or less rounding errors when calculating the clock ticks per line and pixel.

Thanks,
- Wolfgang.

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Re: VS23S010 and VGA monitor

Post by Panu » Tue 2019-02-05 17:09

Hi!

Well, numbers in datasheets change as times go by and new test programs and qualifications are made.. I'm not sure what the numbers on the datasheet were when I did this early test. I know that at some point the crystal oscillator in the VS23S010 had a problem around 6..7 MHz where it wouldn't oscillate (or the PLL wouldn't lock?). But higher frequencies have worked nicely in all my tests. From the datasheet point of view the VS23S010 is meant for creating PAL/NTSC signals. And there the 4.43 MHz is the highest clock needed, so we verify at the tester that we can guarantee oscillation at 4.5 MHz. That makes for a clean and nice test program in the chip tester.

I think the chip should work fine with a 25 MHz external oscillator but I don't know for sure as I've never tested it myself.
The standard PAL and NTSC crystal for example would give more or less rounding errors when calculating the clock ticks per line and pixel.
Yeah, well, that would just mean some variations in the widths of the black edges around the 640 pixel area. I wouldn't be overly concerned with it. There's no 25.175 MHz signal anywhere in the VGA port, as it's an analog format. So it's not so critical what the frequency is, as long as the length of each line is correct in microseconds. The width of the non-black visible part, e.g. how many microseconds times how many pixels per microsecond can be whatever you want, the monitor has no way of even knowing how many pixels there are in each line. The only thing I can think of is the "auto adjustment" of certain flatscreen monitors, that might produce a sharper picture if the pixel clock is close to the standard clock.

So, in any case, the first thing is that you can get a VGA picture on a VGA monitor using basically any crystal. But I have not done a 640x480 display with any exact resolution so far, so I also don't have a clear idea of any possible difficulties involved. Only based on the amount of memory, I can calculate that there's enough memory for 3 bits per pixel for 640x480 in a single 23s010 if you want to drive all pixels independently and not duplicate lines etc.

Hmm, this was a long rambling with not much real information, it seems :oops:
I wonder how to proceed...

-Panu
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wfriedrich
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Re: VS23S010 and VGA monitor

Post by wfriedrich » Tue 2019-02-05 19:00

Thanks for the rambling. This gives sometimes better food for thought. Because now I am dreaming:idea: to hook up a 5MHz crystal for a 40MHz PLL clock and try to squeeze 800 x 600 x 2bit out of the chip.

For now I make due with my current setup with the PAL crystal, the VSYNC looked OK already on the scope. The HSYNC pulses were overlapping the VSYNC and had a longer blanking period, which did not look corretly. Sorry I am away from the scope right now and cannot send a screenshot. The 3bit greyscale are sufficient right now, this is all prep work for a VS23S040 board anyways. :D

Cheers,
- Wolfgang.

PS: But why did you folks put the VS23S040 in a BGA package? It will be so hard to solder by hand.

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Re: VS23S010 and VGA monitor

Post by Panu » Tue 2019-02-05 19:53

Hi!

Thanks for the thumbs up! And hey, great that your things are proceeding! I'd be very very happy to see any screenshots/oscilloscope traces from you!
PS: But why did you folks put the VS23S040 in a BGA package? It will be so hard to solder by hand.
Three reasons, last of which should get you laughing: price, size and the ease of soldering! :D

Really, BGA is one of the easiest packages to solder, perhaps easiest of all and certainly the fastest. The solder is already supplied in the package: it's the balls! All you need is a PCB with a solder mask (the green/colored stuff), home-made PCB does not work. The magic is that the package is self-aligning: the surface tension of the solder balls draws it to the correct position. All you need to do is to place the IC on top of your PCB, using tweezers and magnifying glass/microscope to see that it's roughly in the correct position. And then you just heat it up using whatever you have at hand. A hot air gun is the most low cost solution, we use IR lamp and factories use oven. I know people who have soldered BGAs by placing the PCB on top of a kitchen stove :)

-Panu
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wfriedrich
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Re: VS23S010 and VGA monitor

Post by wfriedrich » Wed 2019-02-06 15:49

Challenge accepted! 8-)

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Re: VS23S010 and VGA monitor

Post by wfriedrich » Sun 2019-02-10 22:46

Hello Panu,
Panu wrote:
Tue 2019-02-05 19:53
I'd be very very happy to see any screenshots/oscilloscope traces from you!
I used the defines from your VGA demo code with 100 visible pixels and 480 lines in a 800x525 frame (setup for 640x480image)
Here are some plots attached:
tek00000.png
tek00000.png (6.63 KiB) Viewed 1350 times
Image 00000:
Shows 2 VSYNC pulses with nice 60Hz frame rate :!: and 63.5usec(Image00002 has the good value) sync pulse width (OK :!: ).
I would expect the VSYNC pulse outside the HYNC pulse train. :?:

.
TEK00001.PNG
TEK00001.PNG (7.97 KiB) Viewed 1350 times
Image 00001:
Shows the HSYNC pulse train of ~5.55msec with HSYNC pulse width of 3.15usec (close to the correct 3.81usec) :?: .

.
TEK00002.PNG
TEK00002.PNG (7.7 KiB) Viewed 1350 times
Image00002:
Shows the HSYNC pulse width (3.15usec) and pulse period of 31.8usec (whole line length OK). This calculates to ~175 pulses (Not OK).
I would expect either 480 HYNS pulses or 525. If 480 is correct the VSYNC should be outside the HYNC pulse train.

My guess is, that the protolines are OK but the picture line indexes are not quite right. :(
I am working on a cable now to connect to an actual monitor to see what is going on. And I am going to write a memory dump to look at the real content that was generated (Gotta love the Arduino debug capabilities :evil: ).

Any thoughts?
Thanks,
- Wolfgang.

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Re: VS23S010 and VGA monitor

Post by Hannu » Mon 2019-02-11 8:14

wfriedrich wrote:
Sun 2019-02-10 22:46

Shows the HSYNC pulse width (3.15usec) and pulse period of 31.8usec (whole line length OK). This calculates to ~175 pulses (Not OK).
I would expect either 480 HYNS pulses or 525. If 480 is correct the VSYNC should be outside the HYNC pulse train.

My guess is, that the protolines are OK but the picture line indexes are not quite right. :(
I am working on a cable now to connect to an actual monitor to see what is going on. And I am going to write a memory dump to look at the real content that was generated (Gotta love the Arduino debug capabilities :evil: ).

Any thoughts?
Thanks,
- Wolfgang.
You have had nice progress. If you get HSYNC and VSYNc right, you have half of problem solved. Next is the blank level on the front and back porches.

I hope you have level shifters between VS23S and arduino. VS23S doesn't like 5 volts.

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Re: VS23S010 and VGA monitor

Post by Panu » Mon 2019-02-11 12:24

Hi, Wolfgang!

Just one check, do you do the syncs using the digital output pins (shared with 8 bit bus) like in my first VGA demo? You know, with something like:

Code: Select all

	// Use GP pins to set HSYNC start
	SpiRamWriteWord(PROTOLINE_WORD_ADDRESS(0), 0x8160); //GP0=1(VSYNC), GP1=0(HSYNC) 
	// Use GP pins to set  HSYNC end
	SpiRamWriteWord(PROTOLINE_WORD_ADDRESS(0)+HSYNC_WIDTH_PLLCLKS, 0x8360); //GP0=1(VSYNC), GP1=1(HSYNC) 
?
My guess is, that the protolines are OK but the picture line indexes are not quite right. :(
Digital sync outs are only generated in the proto region so visible pixels don't have any effect on them. You must have at least 2 kinds of protolines, protoline zero only has the HSYNC and another protoline must generate also the VSYNC. In the beginning of the frame you'll have a number of the VSYNC protolines and all others will have protoline 0 + optional pixel data..

-Panu
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