XRESET Capacitor Value.

Designing hardware that use VLSI Solution's devices as the system controller for the entire design.
Post Reply
ed_haslam
User
Posts: 10
Joined: Wed 2023-10-25 8:00

XRESET Capacitor Value.

Post by ed_haslam »

Hello,

Wondering what the recommended value is for the capacitor to ground on the VS1000's XRESET line when using the suggested 100K pull-up resistor? I've seen example schematics with a 0.1 uF capacitor or no capacitor at all. One VS1000 datasheet recommends a 10uF capacitor but without either a current limiting series resistor or diode across the pull-up resistor it seems to me, that large a capacitance might do damage to a CMOS input during power down. Any suggestions would be greatly appreciated.

Thank you
User avatar
pasi
VLSI Staff
Posts: 2136
Joined: Thu 2010-07-15 16:04

Re: XRESET Capacitor Value.

Post by pasi »

Hi,

I suggest 100nF.

When the voltage of IOVDD is a diode threshold voltage lower than xRESET, the charge in the capacitor starts to be discharged through the xRESET pin's protection diode to IOVDD. Because IOVDD drops slowly due to its own bypass capacitors, the current shunted through the protection diode will always be small enough to not cause any breakage.

The VS1000 datasheet (version 1.52) shows how xRESET must stay low long enough after IOVDD rises above the transistor threshold voltage of the silicon process, so that an actual reset is generated. If xRESET and IOVDD rise in sync, due to the hysteresis of the xRESET input, reset might never be generated. There's a whole chapter about power-on reset, so make sure your datasheet is new enough.

However, we only know of one place in the vs1000's vsdsp4 core that needs reset. The interrupt controller state machine can get stuck without a reset. The vs1000 audio module has a code workaround, which detects if the DAC interrupts do not get serviced and watch-dog resets the chip in that case. We didn't want to update the module schematics, because a change could affect customer designs (where they often control xRESET externally anyway).
Edit: Our current vs1000 audio module has a place for the xRESET capacitor, but it isn't populated in production.

Code: Select all

/*After InitAudio() and enabling of the DAC interrupt, check if a DAC interrupt has been serviced. */
#if 1 //20200717 workaround for having no power-up reset.
  if (audioPtr.rd == audioBuffer) {
    /* No DAC interrupt, probably we didn't have a power-up reset at all. */
    USEX(WDOG_CONFIG) = 2;
    USEX(WDOG_RESET) = 0x4ea9; /*Activate watchdog.*/
    while (1)
      ; /*Wait for watchdog to reset us.*/
  }
#endif
Visit https://www.facebook.com/VLSISolution VLSI Solution on Facebook
ed_haslam
User
Posts: 10
Joined: Wed 2023-10-25 8:00

Re: XRESET Capacitor Value.

Post by ed_haslam »

Hello Pasi,

Thank you for the detailed reply, it's much appreciated. This application works a 4 ohm speaker pretty hard on a limited power source and even though I'm trying everything to keep electrical spikes out, the VS1000 supply is still a bit noisy. An occasional reset would be acceptable but a total lockup would definitely not be ideal. So after your suggested start-up code, do you think it's then worth just leaving the watchdog timer running and resetting it periodically in the play loop to guard against problems once the device is operating?

Thank you,

Ed
User avatar
pasi
VLSI Staff
Posts: 2136
Joined: Thu 2010-07-15 16:04

Re: XRESET Capacitor Value.

Post by pasi »

I don't think watchdog is a solution for voltage drops. vs1000 has a power-on reset circuit, which monitors CVDD and (as long as AVDD is present to provide a voltage reference) prevents execution of code in suspect situations.

IOVDD and CVDD regulators need AVDD. If AVDD brown-outs due to VHIGH dropping, the other voltages also go down.

If CVDD drops faster than AVDD, then power-on reset usually triggers, which in most designs will turn off analog power consumption (and external amps if you have chosen GPIO polarity correctly). So, the system restarts and might even try to detect this using uninitialized variables (the whole RAM isn't cleared during boot).

You can change the ratio of the power supply capacitors to affect what kind of behavior you get during supply power dips.

However, changing the ratios may make powering off by software control more difficult.

The case is: when power-on reset triggers, this reduces power consumption on CVDD, thus CVDD jumps, de-asserting the power-on reset, and restarting the system. The reset cleared regulator shutdown signals, so regulators start working again.
The solution for this case is: If IOVDD drops faster than CVDD, the crystal oscillator stops and the chip doesn't get out of reset, because leaving reset needs clock.
Visit https://www.facebook.com/VLSISolution VLSI Solution on Facebook
ed_haslam
User
Posts: 10
Joined: Wed 2023-10-25 8:00

Re: XRESET Capacitor Value.

Post by ed_haslam »

Thank you Pasi,

I'll adjust VS1000 behaviour based on the bypass capacitors.

Best regards,

Ed
Post Reply