VS1053 Tests

[GiovanniD91]

Hi everyone,
I have VS1053 with microcontroller PIC24. I need to play some audio MP3. I have checked the SPI, XCS, XDCS (SPI 2MHz) and it works good. However I have some problems with tests. Before the list of problem, the mode register is set to 0x0820.
1) SCI register test. In this test I have to send a magic packet with 4th byte equal to address of register under test, then I have to read the register HDAT0. The first register is MODE(0x00). It works I read 0x0820 in HDAT0. Now I send the magic packet again (after check DREQ and wait enough time) with 4 byte equal to 0x1 (address of status). It doesn't work. The HDAT0 is zero. So this is the problem. I'm sure that SPI works because I set correctly the sci_mode and performe correctly the first test. Now, how many time I can perform this test in sequence? How to fix it?
2) I perform new sin test, by setting the sci register. Before it, I set the register AUDATA for 48kHz mono mode. It works. The sin have desired frequency. However, after the first iteration the sound become distorted and after 4/5 iterations no sound in output. How many time this test can be performed in loop? If it can performed in loop, how to fix it?
3) I perform old sine test. It doesn't work. No sound output.
I suppose i have problem with DREQ. However, i check if it is low and then I sent at least 32Byte. So I do not know what is the problem. Can you help me?
Thanks you for answers

[pasi]

1) If you start with the sci register 1, do you then get the contents of the SCI_STATUS register?

The other tests do not automatically return. Once you enter them, they run until you exit (the old sine test has a pattern to end it) or software reset (using the SCI_MODE register bit).

2) You can change the samplerate (AUDATA) and frequencies (AICTRL0 / AICTRL1) during the test without restarting it. To end the test, give a software reset. After that you can restart the test.

3) You should just need SM_TESTS bit in SCI_MODE, then send the sine sequence to SDI.

There could be some chip select handling issue. All SCI transactions also need to end with xCS going high, so that the next transaction can start normally.