This is a work-in-progress thread where I suggest we will gather any tips and guidelines on how to design functioning products that use VS1005. The topic will be edited constantly.
Please study this list carefully, because all notes here are things that have caused problems or needed fixing in at least some PCB board.
Design for Debuggability. Design for Productability.
* Provide debug header on your PCB: Provide pads to solder pins for VHIGH, RX, TX and GND. Without these pins, your product may be impossible to debug or produce. Both RX and TX need pull-up resistors.

* Consider how the initial flash contents is to be loaded in production. Provide USB pins on pin headers (if your product doesn't have USB port) for pushing the operating system files to the board during production.
* For writing to the flash in system, you need a flash that has 4K sector erase capability.
* Provide a ground pin on the PCB for connecting the oscilloscope probe ground.
* SD card can also theoretically be used for initial flash programming during production.
Choose carefully which GPIO pins you use.
See the developer board schematic as guidelines. The Kernel needs to use the following pins:
* XCS0 (GPIO 1.1, the SPI flash chip select), NFCE (GPIO0.11, the NAND flash chip select) and GPIO1.15 (the LCD display chip select) for various purposes, and the kernel presumes that there is a 74HC138 address decoder connected to these pins so the kernel constantly writes to all three.
* NFRDY (Nand Flash Ready) pin needs a pull-up, otherwise booting may get stuck in waiting for a (non-existent) Nand Flash to become ready. The boot dead-locks if there is a floating/high NFCE with a floating/low NFRDY. For proper operation, always pull NFRDY high during boot.
* Some bus (usually SPI0) for communicating with a system flash memory.
* UART for console messages and debugging. Both RX and TX need pull-up resistors on the PCB. Floating RX will eventually cause a deadlock and floating TX will cause spurious transmissions at reset.
* GPIO0.7 for determining the boot voltage and GPIO0.0 - GPIO0.3 for determining the boot cofiguration and for mechanical push-buttons whenever there are some.
* GPIO0.0 - GPIO0.7 together with the chip select pins for switching external powers such as SD card regulator or USB regulator on and off: Whenever a driver calls SetPower, pins GPIO0.0 - GPIO0.7, XCS0, NFCE and GPIO1.15 are written to - if this causes problems with your board, rewrite the SetPower function in the Kernel (see here).
* GPIO0.0 - GPIO0.3, TMS, TDI and DBG are also checked by the ROM firmware at boot: if they are all high, the internal flash is erased. To prevent this from happening inadvertently, make sure that at least one of these pins is pulled low (with 10K...100K resistor) during boot.
Other buses and their pins are largely left unused (although they might get an initial value during bootup). You can use such peripherals that you don't need as GPIO pins. For example GPIO2.0 to GPIO2.3 (the JTAG pins TMS, TDI, TDO and TCK) are good pins to be used as GPIO pins.
Design for Reliability.
* VS1005G: Connect FVDD (pin 6) to IOVDD (pin 7). This is a work-around for a VS1005G boot timing criticality that causes boot problems in early VS1005G production lots.
* Provide own regulator for the SD card.
* Connect the SD card regulator to some VS1005 pin so that the SD card can be powered up, down and resetted. Otherwise it might not work at all.

* Use somewhat smaller capacitors for the crystal than is customary. The oscillator starts more reliably with today's low power crystals when the capacitors are smaller. Instead of 30pF use something like 10pF. And don't forget the 1 Mohm parallel load resistor.
Design for Quality.
* Provide good ground and enough bypass capacitors.
* PCB ground layout considerations: viewtopic.php?f=10&t=1101
* Soldering and stencil design guide: download/file.php?id=1484
* To be continued...